<parts>
    <!-- BANK 0 -->
    <regblock name="SFRC" start="0x0000" end="0x0004" streg="STATUS">
        <register name="INDF"    addr="0x00" bits=""/>
        <register name="TMR0"    addr="0x01" bits=""/>
        <register name="PCL"     addr="0x02" bits="" reset="11111111"/>
        <register name="STATUS"  addr="0x03" reset="00011000" mask="11000111"
                  bits="C,DC,Z,PD,TO,-,CW,GW"/>
                  
        <register name="FSR"     addr="0x04" bits=""/>
    </regblock>
    
    <sleep name="SLEEP"/>
    
</parts>
